switch case within process vhdl
p_CASE : process (r_VAL_1, r_VAL_2, r_VAL_3)
variable v_CONCATENATE : std_logic_vector(2 downto 0);
begin
v_CONCATENATE := r_VAL_1 & r_VAL_2 & r_VAL_3;
case v_CONCATENATE is
when "000" | "100" =>
r_RESULT <= 0;
when "001" =>
r_RESULT <= 1;
when "010" =>
r_RESULT <= 2;
when others =>
r_RESULT <= 9;
end case;
end process;
Are there any code examples left?
New code examples in category Other
-
Other 2023-03-27 22:50:10 how to select the whole line in vscode with keyboard shortcut
-
Other 2022-03-27 22:45:24 income of a web developer
-
Other 2022-03-27 22:35:01 \pyrcc_main.py: File does not exist 'resources.qrc'
-
Other 2022-03-27 22:30:45 rick roll embed code
-
Other 2022-03-27 22:20:08 Circuit_04_Potentiometer
-
Other 2022-03-27 22:20:05 iterative power
-
Other 2022-03-27 22:15:11 flutter run all
-
Other 2022-03-27 22:10:05 when is karlson release
-
Other 2022-03-27 22:10:02 wp .htaccess example
-
Other 2022-03-27 22:00:08 bash pause in file read line by line